1. Field of the Invention
The present invention relates to a wafer processing method, a wafer polishing apparatus, and an ingot slicing apparatus.
2. Description of the Related Art
Conventionally, a wafer is formed by slicing an ingot and a wafer is planarized by polishing a surface of the wafer. In a case where a high hardness wafer such as a silicon carbide (SiC) wafer is planarized by polishing, a reformed layer having a lower harness than SiC is formed at a surface portion of the SiC wafer and the reformed layer is polished so as to improve a processing efficiently compared with a case where the SiC wafer is polished without forming a reformed layer.
For example, JP-A-2009-283629 discloses a planarization method in which a SiC wafer is heated in a heating furnace so as to form SiO2 having a lower hardness than SiC at a surface portion of the SiC wafer as a reformed layer, and a surface of the SiC wafer is planarized by removing SiO2.
JP-A-2009-141353 (corresponding to US 2009/0142247 A1) discloses a planarization method in which a SiC wafer is oxidized in a ultrasonic bath so as to form SiO2 having a lower hardness than SiC at a surface portion of the SiC wafer as a reformed layer, and a surface of the SIC wafer is planarized by removing SiO2, for example, by wet etching.
However, in the above-described planarization methods, the reformed layer is formed along the surface of the wafer. If the wafer has a rough surface, the reformed layer is formed along the rough surface. Thus, when a planarization process is performed, there is a possibility that the reformed layer is completely removed at a protruding portion of the wafer and then a structure formed in the wafer is also polished. Therefore, a processing efficiency cannot be improved sufficiently. Furthermore, when the structure formed in the high hardness wafer is polished, a defect such as dislocation may be caused under a polished surface.
In order to solve the above-described issue, a reforming process for forming the reformed layer on the wafer and a planarization process for polishing the surface of the wafer may be alternately performed so that the reformed layer can be polished with certainty in the planarization process. However, in the above-described methods, the reforming process and the planarization process are performed with different apparatuses. Thus, when the reforming process and the planarization process are alternately performed, the number of manufacturing processes is increased, and the processing efficiency is reduced.
JP-A-2007-311586 discloses a planarization process in which an oxidizing agent including colloidal silica is mixed into an abrasive agent so that SiO2 having a lower hardness than SiC is formed at a surface portion of a SiC wafer when a surface of the SiC wafer is planarized with the abrasive agent.
An oxidation rate by an oxidizing agent is lower than an oxidation rate by thermal oxidation. Thus, when the reformed layer is formed with an oxidizing agent, it takes a long time to form the reformed layer and the processing efficiency cannot be improved sufficiently. Furthermore, because a polishing apparatus is subjected to the oxidizing agent, the polishing apparatus may be damaged in the long term.